Pipelined digital logic is a structure familiar, or at least accessible, to most circuit designers. Likewise, the mathematical properties of acyclic pipeline circuits can be formalized as a composition of functions. The circuits we wish to describe, however, are pipelines with feedback (directed cycles) and we need to develop some machinery for reasoning about them.
For the reader who is more comfortable with an intuitive approach to circuit design the following will serve to introduce the mathematics behind our circuit. For the mathematician, the central difficulty is to get a handle on the role of time in these circuits.